System Test with Boundary Scan (JTAG)
Toronto, ON, Nov, 2006 - Boundary scan (IEEE 1149.1/JTAG) is most often thought of as a board-level test method, but new hardware and software techniques make system-level test with boundary scan not only feasible, but quite effective. In fact, system-level tests with boundary scan can save a significant amount of time and effort troubleshooting systems that have failed functional test. Ultimately, boundary-scan system tests ensure a high-quality system.
Many different types of faults can arise when systems are assembled. JTAG testing techniques are well suited to finding and diagnosing many of these problems. In addition, the usefulness of boundary scan at the system level extends well beyond what is usually thought of as test functions. Besides structural integrity tests, JTAG can also perform on-board programming of flash memory, in-system configuration of programmable logic devices (PLDs), on-board programming with I2C data and emulation-based functional testing through a processor's JTAG debug port. Some of these functions can be very helpful to support and maintenance personnel long after a system has been assembled in a manufacturing environment and installed at a customer location.
The logical place to begin a discussion of boundary-scan system-level testing is to define what system test means and to distinguish it from board test, which is the more typical arena for boundary scan. A system can be defined as "a group of interrelated, interacting, or interdependent constituents forming a complex whole." (Webster Dictionary) For the purposes of this discussion, system will mean more than one board connected together. This could be an assembly as simple as a mother/daughter board combination or an extremely complex backplane-based computer with hundreds of boards.
Most electronic products can be seen as a system. Even if all of the system's components are fully tested individually, the system still may not function properly. Many problems can arise when systems are assembled. Boundary scan is well suited to finding and diagnosing these problems. For example, a connector may not be making good electrical contact or a connector's pins might be damaged during assembly. Boards on a backplane may be missing, out of place or simply not functioning properly. Functional tests might identify that the system is not functioning as expected, but isolating and diagnosing the fault with functional tests would be very time consuming and often would require high-level system expertise to troubleshoot the cause.
Over the course of the last decade, boundary scan has established a firm foothold at the level of board test, but it also has a critical function to play at the system level. Indeed, as more board-level boundary-scan tests and programming operations are developed and deployed, the feasibility of implementing system-level boundary-scan operations increases because the developmental work done for individual boards can be leveraged against system-level objectives. Moreover, any additional effort to implement boundary scan at the system level is merely marginal when boundary scan has already been deployed at the board level. The board-level infrastructure is already in place for system-level tests. As a result, the payback for system-level boundary scan can be quite rapid because of the limited amount of development time required to implement system-level boundary-scan test as an add-on to board-level boundary-scan operations.
